| 研究者所属（当時） | 資格 | 氏名 | |
|---|---|---|---|
| （代表者） | 理工学術院 大学院情報生産システム研究科 | 教授 | 篠原 尋史 |
- 研究成果概要
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Secure LSI is a key technology to protect growing IoT from hacking. In this research, its prime building block PUF (Physical Unclonable Function) is focused. Test chip has been designed and fabricated in 180nm CMOS using VDEC shuttle service. Test circuits and measurement results are as follows.
(1) nMOS and pMOS transistors array: It has 5 types of nMOS FETs and 3 types of pMOS transistors each of them is repeated 16 times. Drain current of each transistor can be measured independently.
Vth random variation of each type of MOS FET is evaluated by measuring 5 chips. And Perglom’s constant Avt are derived for nMOS FET and for pMOS FET.
(2) SRAM PUFs: Eight SRAM PUFs with different bit cell FET sizes are integrated on the chip.
Bit error rate (BER) of the PUFs are measured by evaluating the output data 500 times each. Measured BERs are compared and discussed, and effects of device mismatch and noise on BER has been made clear.
NBTI (Negative Bias Temperature Instability) electric stress is imposed to one of the PUF, and BER was reduced from 3.23% to 0%.